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74HCT374D Linear And Digital Integrated Circuits , Computer Microchip

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74HCT374D Linear And Digital Integrated Circuits , Computer Microchip

Brand Name : Philips Semiconductors
Model Number : 74HCT374D
Certification : Original Factory Pack
Place of Origin : Philippines
MOQ : 20pcs
Price : Negotiation
Payment Terms : T/T, Western Union,PayPal
Supply Ability : 5300PCS
Delivery Time : 1 Day
Packaging Details : please contact me for details
FEATURES : • 3-state non-inverting outputs for bus oriented applications
FEATURES2 : • 8-bit positive, edge-triggered register
FEATURES3 : • Common 3-state output enable input
FEATURES4 : • Independent register and 3-state buffer operation
FEATURES5 : Output capability: bus driver
FEATURES6 : • ICC category: MSI
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74HCT374D Linear And Digital Integrated Circuits , Computer Microchip


74HCT374D Octal D-type flip-flop; positive edge-trigger; 3-state


FEATURES

• 3-state non-inverting outputs for bus oriented applications

• 8-bit positive, edge-triggered register

• Common 3-state output enable input

• Independent register and 3-state buffer operation

• Output capability: bus driver

• ICC category: MSI


GENERAL DESCRIPTION

The 74HC/HCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.


The 74HC/HCT374 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the 8 flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. The “374” is functionally identical to the “534”, but has non-inverting outputs


SYMBOLPARAMETERCONDITIONS
tPHL/ tPLHpropagation delay CP to QnCL = 15 pF; VCC = 5 V
fmaxmaximum clock frequencyCL = 15 pF; VCC = 5 V
CIinput capacitance
CPDpower dissipation capacitance per flip-flopnotes 1 and 2


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